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[[File:GoIT_logo_1700px.png|thumb|Logo of the '''Go IT!''' project.]]
[[File:GoIT_logo_1700px.png|thumb|Logo of the '''Go IT!''' project.]]


The '''Go IT!''' is an EU ''Coordination and Support Action (CSA)'' funded under [https://research-and-innovation.ec.europa.eu/funding/funding-opportunities/funding-programmes-and-open-calls/horizon-europe/cluster-4-digital-industry-and-space_en cluster 4 (Digital, Industry and Space)], of [https://op.europa.eu/en/web/eu-law-and-publications/publication-detail/-/publication/3c6ffd74-8ac3-11eb-b85c-01aa75ed71a1 Horizon Europe]. The project was submitted on [https://wiki.f-si.org/index.php?title=Horizon_2021_Coordination_and_Support_Action_(CSA)_proposal October 21 2021], was awarded on March 18 2022 and started on September 1 2022. Its planned duration is three years. The project number (ID) is 101070660.
The '''Go IT!''' is an EU ''Coordination and Support Action (CSA)'' about ''Open Source Hardware for ultra-low-power, secure processors'' funded under [https://research-and-innovation.ec.europa.eu/funding/funding-opportunities/funding-programmes-and-open-calls/horizon-europe/cluster-4-digital-industry-and-space_en cluster 4 (Digital, Industry and Space)], of [https://op.europa.eu/en/web/eu-law-and-publications/publication-detail/-/publication/3c6ffd74-8ac3-11eb-b85c-01aa75ed71a1 Horizon Europe]. The project was submitted on [https://wiki.f-si.org/index.php?title=Horizon_2021_Coordination_and_Support_Action_(CSA)_proposal October 21 2021], was awarded on March 18 2022 and started on September 1 2022. Its planned duration is three years. The project number (ID) is 101070660.


=Proposal short summary=
=Proposal short summary=
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#* [https://www.lip6.fr/actualite/personnes-fiche.php?ident=P109 Jean-Paul Chaput], [https://www.lip6.fr/recherche/team.php?acronyme=CIAN group of Analog and Digital Integrated Circuit (CIAN) at LIP6]
#* [https://www.lip6.fr/actualite/personnes-fiche.php?ident=P109 Jean-Paul Chaput], [https://www.lip6.fr/recherche/team.php?acronyme=CIAN group of Analog and Digital Integrated Circuit (CIAN) at LIP6]
#* [https://www.lip6.fr/actualite/personnes-fiche.php?ident=P98 Marie-Minerve Louerat], [https://www.lip6.fr/recherche/team.php?acronyme=CIAN group of Analog and Digital Integrated Circuit (CIAN) at LIP6, CNRS]
#* [https://www.lip6.fr/actualite/personnes-fiche.php?ident=P98 Marie-Minerve Louerat], [https://www.lip6.fr/recherche/team.php?acronyme=CIAN group of Analog and Digital Integrated Circuit (CIAN) at LIP6, CNRS]
# CIME-P, France
#* Kholdoun Torki, CNRS
#* Jeremy Perret, CIME-P, a team within [http://www.cime.inpg.fr/ CIME Nanotech], a lab from [https://www.grenoble-inp.fr/ G-INP]
#* Aurélien Nicolet, CIME-P, a team within [http://www.cime.inpg.fr/ CIME Nanotech], a lab from [https://www.grenoble-inp.fr/ G-INP]
# [https://f-si.it Free Silicon Foundation (I) ETS], Italy
# [https://f-si.it Free Silicon Foundation (I) ETS], Italy
#* [https://orcid.org/0000-0002-1245-4179 Luca Alloatti]
#* [https://orcid.org/0000-0002-1245-4179 Luca Alloatti]
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#* [https://orcid.org/0000-0003-1059-5338 Piedad Brox Jiménez], [http://www.imse-cnm.csic.es/home.php Instituto de Microlelectronica de Sevilla]
#* [https://orcid.org/0000-0003-1059-5338 Piedad Brox Jiménez], [http://www.imse-cnm.csic.es/home.php Instituto de Microlelectronica de Sevilla]
#* [https://dargcsic.github.io/ David Arroyo Guardeno], [https://www.itefi.csic.es/es  Instituto de Tecnologías Físicas y de la Información]
#* [https://dargcsic.github.io/ David Arroyo Guardeno], [https://www.itefi.csic.es/es  Instituto de Tecnologías Físicas y de la Información]
#* [https://orcid.org/0000-0003-3025-5736 Macarena Cristina Martínez Rodríguez], [http://www.imse-cnm.csic.es/home.php Instituto de Microlelectronica de Sevilla]
#* Pablo Navarro Torrero, [http://www.imse-cnm.csic.es/home.php Instituto de Microlelectronica de Sevilla]
#* Pablo Navarro Torrero, [http://www.imse-cnm.csic.es/home.php Instituto de Microlelectronica de Sevilla]
# FibraServi (FS), Belgium
# FibraServi (FS), Belgium
#* Staf Verhaegen ([https://fosstodon.org/@Chips4Makers @Chips4Makers@fosstodon.org], [https://gitlab.com/FatsieFS FatsieFS@gitlab])
#* Staf Verhaegen ([https://fosstodon.org/@Chips4Makers @Chips4Makers@fosstodon.org], [https://gitlab.com/FatsieFS FatsieFS@gitlab])
# G-INP/CIME-P, France
#* Jeremy Perret, CIME-P, a team within [http://www.cime.inpg.fr/ CIME Nanotech], a lab from [https://www.grenoble-inp.fr/ G-INP]
#* Aurélien Nicolet, CIME-P, a team within [http://www.cime.inpg.fr/ CIME Nanotech], a lab from [https://www.grenoble-inp.fr/ G-INP]
=Results=
* 2023.7.10-12, the [https://wiki.f-si.org/index.php/FSiC2023 Free Silicon Conference (FSiC2023)] took place in Sorbonne Université, Paris, France
* 2023.11.3, FSI publishes a [https://wiki.f-si.org/index.php?title=Recommendations_and_roadmap_for_the_development_of_open-source_silicon_in_the_EU list of recommendations and a roadmap for the development of open-source silicon in the EU]
=Newsletters=
* 2023.9.23, CSIC publishes a [https://wiki.goit-project.eu/images/5/5c/Newsletter_GoIT_M6.1.pdf newsletter about open initiatives in hardware security]


=Contact=  
=Contact=  
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=See also=
=See also=
==Related EU projects==
* [[Related conferences]]
* [https://eupilot.eu/ The European PILOT] aims at demonstrating an all European technology by including open source hardware for HPC
* [[Related EU projects]]
* [https://www.european-processor-initiative.eu/ The European Processor Initiative (EPI)] aims at designing and implementing a roadmap for a new family of low-power European processors for extreme scale computing, high-performance Big-Data and a range of emerging applications
* [https://eupex.eu/ The European Pilot for Exascale] aims at building and validating the first HPC platform integrating the full spectrum of European HPC technologies, from architecture, processors and interconnect to system software.
* [https://www.montblanc-project.eu/ The European Modular and Power-Efficient HPC Processor] aimed to start developing building blocks (IPs) for an HPC processor

Latest revision as of 21:15, 30 January 2024

Logo of the Go IT! project.

The Go IT! is an EU Coordination and Support Action (CSA) about Open Source Hardware for ultra-low-power, secure processors funded under cluster 4 (Digital, Industry and Space), of Horizon Europe. The project was submitted on October 21 2021, was awarded on March 18 2022 and started on September 1 2022. Its planned duration is three years. The project number (ID) is 101070660.

Proposal short summary

Europe's IT hardware development is constantly challenged by outrageously expensive development tools, legal constraints like NDAs or patents, lock-in threats, dependency from external vendors or supply chains and foreign political events. Europe’s digital infrastructure (from consumer to critical appliances) is heavily relying on foreign closed-source chips which are literally black-boxes which may (and have been proven to) contain malicious features. This situation makes the hardware development expensive and inefficient, and undermines the very principles of sovereignty, resilience and re-usability. Open-source silicon chips, which are open in their entirety, i.e. down to the physical layout, carry the potential of catapulting Europe into a renaissance of digital technology. Several challenges are on the way, many of which will require the participation of the stakeholders (from the fertile ground made of “nerdy” hobbyists and makers who are the early protagonists of the scene, all the way up to large enterprises), as well as the participation of policymakers and regulatory bodies. The road ahead is steep, but rich of rewards. Therefore we loudly say: Go IT!

Proposal manuscript

The manuscript of the submitted proposal can be downloaded (here).

Goals

The main goals of the project can be summarized as follows:

  1. Feedback the policymakers with technical reports and roadmaps
  2. Facilitate the creation of a complete and complementary know-how for open-source chip design across European universities
  3. Organize three editions of the Free Silicon Conference
  4. Develop a GPL-compatible forever-open (copyleft) licence for silicon chips
  5. Include the available open-source PDK in existing open-source design flows
  6. Create a repository of open-source EDA tools and hardware blocks
  7. Package open-source tools into mainstream GNU/Linux distributions
  8. Disseminate the existing open-source tools and libraries on mainstream channels like Wikipedia
  9. Promote the concept of open-source silicon chips through the participation at mainstream conferences, talks and paid advertisement
  10. Contribute to standardization and certification activities for open-source silicon chips

Consortium

  1. Elektronikas un Datorzinatnu Instituts (EDI), Latvia (coordinator)
  2. Sorbonne Université (SU), France
  3. Free Silicon Foundation (I) ETS, Italy
  4. Agencia Estatal Consejo Superior de Investigaciones Cientificas (CSIC), Spain
  5. FibraServi (FS), Belgium
  6. G-INP/CIME-P, France

Results

Newsletters

Contact

All the members of the consortium can be contacted at once by writing at mail' 'at' goit-project.eu.

See also